Hi,
We currently designing new carrier board for Orin AGX module and I would like your advise about Power Up sequence stages we designed:
Our PU process include 3 stages:
Stage 1 shows the input power (from DC jack or PoE) the output is VIN_SW which is input for stage 2 (red lines).
This signal converted to 12V and 5V and enter to the AGX.
After that, the module generate “CRR_PWR_ON” which enables the 5V DC2DC for the low-level DC2DCs (stage 3)
The “CRR_PWR_ON” also enters to a PSoC as a input, for now, as a provision for future use.
We would like to know if this design can work, we tried to prevent using uC as a power up manager.
Thanks in advance.
Omer.