Xavier pad voltage and PMIC power rail question, especially for PCIe


I have questions for Xavier’s pad voltage and PMIC power rail, especially for PCIe (and some GPIO pins).

I read the chapters of “Pad Voltage Configuration” and " PMIC Configuration" in “Jetson develper guide”. And I know that some of Xavier’s pad and pins are configurable to operate at different voltage levels, and the pad voltage configuration MUST match with PMIC power rail configurable. Otherwise, it won’t work or even damage the pins.

  1. What is the pad voltage and PMIC power rail configured for PCIe? I checked OEM doc, OEM says all of the CLKREQ, RESET_n, and WAKE_n signals are “CMOS - 1.8V”. So, I think PCIe is at 1.8V level? Also, based on device-tree, PCIe is set to vddio-pex-ctl-supply = <&p2888_spmic_sd3>; and p2888_spmic_sd3 is vdd-1v8-ao. So, it seems to be 1.8V based on device-tree as well? However, in the “Jetson_AGX_Series_DevKit_Pinmux_Configuration_Template.xlsm” the pinmux spreadsheet. It has a column for “3.3V Tolerance Enable”. And all PCIe pins are set to “Enable” on “3.3V Tolerance Enable”. Does it mean that it is 3,3V? I am so confused on on that “3.3V Tolerance Enable” in pinmux spreadsheet. What is the meaning of it?

  2. For GPIO6, 7, 8, 9, 10, OEM doc (in CAN chapter) says they are “CMOS 3.3V”. In the pinmux spreadsheet, they are part of the “AO_HV (3.3V)” section. So, I think they are set to 3.3V? However, why in pinmux spreadsheet, there is even no selection option to enable “3.3V Tolerance Enable” for those pins? Also, which part of device-tree set them to be 3.3V? Or they are set in MB1’s pad-voltage config settings?

  3. For “POWER_BTN_N”, OEM doc says it is “Open Drain, 3.3V”. However, in the pinmux spreadsheet, POWER_BTN_N is in “SYS” section (not 3.3V section). Also, its “3.3V Tolerance Enable” column is NOT allowed to be selected for enable!


I see that:

For 3, on OEM it says POWER_BTN_N is having “3.3V to 1.8V level shifter on the module.”

For 1 and 2, I should find out the power rail and pad voltage setting based on “IO Block Voltage” column in pinmux spreadsheet.

But I am still a bit confused on " 3.3V Tolerance Enable" meaning. Does it mean that when I set the 1.8V pin as INPUT , and if I apply 3.3V to it, it won’t damage it?

One more thing I want to ask/confirm is how the pad voltage and PMIC power rail are configured in device-tree?

For PMIC power rail, the power rail (regulator) supplier are in regulators section of spmic@3c, e.g. p2888_spmic_sd3. Then, consumers just use the standard device-tree regulator XXX-supply = binding. Correct?

For pad voltage, are all pad voltage defined in child nodes under pmc@c360000? e.g. sdmmc1_e_33V_enable.
The the consumer use pinmux pinctrl-X = binding e.g. pinctrl-0 = <&sdmmc1_e_33V_enable>; correct?


“3.3V tolerance enable” means the pin can work in 3.3V mode.


For 1.8V pin set to INPUT, if I apply 3.3V, it won’t damage it, and it still work, correct?

What about the 1.8V pin set to OUTPUT? It will output 1.8V. What is meaning of 3.3V Tolerance Enable for output pins?


Yes, correct.

No matter on output.

hello lunarking1028,

please check this, Question for gpio regulator (regulator-fixed) - #3 by JerryChang
from the software side, it uses the standard device-tree regulator, (i.e. vana-supply).
you could disassembler the *.dtb file into text file to review the definitions.
for example, $ dtc -I dtb -O dts -o output.txt tegra194-p2888-0001-p2822-0000.dtb

Hi @Trumany

Thanks for your reply.
I have two more questions:

  1. Say, a pin is 1.8V that has NO 3.3V Tolerance, and it is set as output. What will happen if I have external pull up to 3.3V? Will the pin get damaged?
  2. What is the meaning of LPDR column in pinmux spreadsheet? Most pins are set to disable in LPDR, except for PCIe CLKREQ_N, RESET_N, WAKE_N pins. I cannot find any explanation in OEM. I searched in TRM. This is what I found: “Disables most base driver fingers, leaving only minimal base driver finger.” But what does it mean?


  1. Why do you add a pull-up to a output pin? My understanding is you should only consider the tolerance of input side.
  2. LPDR = Low Power Driver.