Description conflict in Xavier spec for PEX pins

Autonomous Machines Jetson & Embedded Systems Jetson AGX Xavier
1

I see that the PEX pins used for PCIe sideband signals (PEX_Lx_CLKREQ_N, PEX_Lx_RST_N)

in the NVIDIA Jetson AGX Xavier OEM Product Design Guide are described as 1.8V CMOS in the pin description, while the PCIe standard are for these signals to be 3.3V. I see in signal tables they show these signals are pulled up to 3.3V. Are these supposed to be 1.8V signals on the module or are they 3.3V tolerant?

The current datasheet also describes the pins as 1.8V.

In the reference design these signals are connected directly to sockets such as the M.2 for NVME or the PCIe socket.

2

The pins are 3.3v tolerant and have 3.3v pull-up in module.

3

Does it mean that output level is 1.8V, input normal is 1.8V, but can tolerant 3.3V ?
My understanding is correct ?

4

Current output level is 3.3v as pins are pulled up to 3.3v as you can see in design guide.