Possible errata on TX2i pinmux

Hi,

I am currently designing a carrier board for the TX2i and I have some questions regarding the PCIe support I/O signals:

  • PE#_RST_L
  • PE#_CLKREQ_L
  • PE_WAKE_L

According to the “Jetson TX2 series pinmux” excel document these signals are +1.8V tolerant but looking at “OEM PRODUCT DESIGN GUIDE NVIDIA Jetson TX2 Series” the signals are open-drain +3.3V tolerant.

Which document is correct?

Thank you

Moving to the TX2 forum for support.

The pins are “3.3v tolerance” enabled as you can see in pinmux sheet.