Does TX2 support MIPI CSI-2 1-lane?

Hi, all

I have the ADV7282M (Single-lane CSI-2 signal) connected to the TX2’s CSI-A as below.

ADV7282M --------- TX2

CLK ---------------> CLK_0
D0 -----------------> D0

Is that correct ?

Thanks for help.

Hi,
Yes any Jetson TX2 CSI can support use only low lane for x1 case.
Your connect mapping is correct.
Thanks.

Hi,

Thanks for reply.

My camera outputs YUV422 stream, so, I modified the source file sensor_common.c to support UVUY format, after
that I wrote a device-tree file base on the example(2-lane case). Yes, it worked. I got six input by using v4l2-API, it’s amazing.

When I changed the bus-with( in the .dtsi file) from 2-lane to 1-lane, and connect the ADV7282M to D0,and add
720x576@50Hz to driver, unfortunately, it did not work in 1-lane case. The fault must be somewhere I can’t find, can you give me some advice ?

Thanks.

hello chivstyle,

you should also consider the pixel clock settings if you change MIPI configuration from two lane to one lane.
please review Sensor Pixel Clock and check your pixel_clk_hz property settings,
thanks

Hello JerryChang,

Thanks for reply. The ADV728x-M outputs video data in an 8-bit YCrCb 4:2:2 format, at a nominal data rate of 432 Mbps. So I modifiy the mode0 like bellow.

pixel_clk_hz = 432000000 / 16 = 27Mhz, or 864x625x50=27Mhz, by the way the calculation in “Sensor Pixel Clock” seems to be wrong, for example

pixel_clk_hz = 2200 * 1125 * 30 = 742500000, there’s an extra 0 after the result, ten times of original one

mode0 {
/* 720x576, 50 FPS */
mclk_khz = “24000”;
num_lanes = “1”;
tegra_sinterface = “serial_a”;
discontinuous_clk = “no”;
dpcm_enable = “false”;
cil_settletime = “0”;
dynamic_pixel_bit_depth = “8”;
csi_pixel_bit_depth = “8”;
mode_type = “yuv”;
pixel_phase = “uyvy”;

            active_w = "720";
            active_h = "576";
            readout_orientation = "0";
            line_length = "864";
            inherent_gain = "1";
            mclk_multiplier = "1.125";
            pix_clk_hz = "27000000";

            min_gain_val = "0";
            max_gain_val = "48";
            min_hdr_ratio = "1";
            max_hdr_ratio = "1";
            min_framerate = "1.5";
            max_framerate = "60";
            min_exp_time = "30";
            max_exp_time = "660000";
            embedded_metadata_height = "0";
        };

But I got this error.

[ 196.866328] tegra_mipi_cal 3990000.mipical: Mipi cal timeout,val:2018970, lanes:6000000
[ 196.866376] tegra_mipi_cal 3990000.mipical: MIPI_CAL_CTRL 0x04 0x2a000010
[ 196.866408] tegra_mipi_cal 3990000.mipical: CIL_MIPI_CAL_STATUS 0x0c 0x02018970
[ 196.866437] tegra_mipi_cal 3990000.mipical: CIL_MIPI_CAL_STATUS_2 0x10 0x00000000
[ 196.866463] tegra_mipi_cal 3990000.mipical: CILA_MIPI_CAL_CONFIG 0x18 0x00000000
[ 196.866488] tegra_mipi_cal 3990000.mipical: CILB_MIPI_CAL_CONFIG 0x1c 0x00000000
[ 196.866513] tegra_mipi_cal 3990000.mipical: CILC_MIPI_CAL_CONFIG 0x20 0x00000000
[ 196.866537] tegra_mipi_cal 3990000.mipical: CILD_MIPI_CAL_CONFIG 0x24 0x00000000
[ 196.866561] tegra_mipi_cal 3990000.mipical: CILE_MIPI_CAL_CONFIG 0x28 0x00000000
[ 196.866585] tegra_mipi_cal 3990000.mipical: CILF_MIPI_CAL_CONFIG 0x2c 0x00200000
[ 196.866609] tegra_mipi_cal 3990000.mipical: DSIA_MIPI_CAL_CONFIG 0x3c 0x00000200
[ 196.866633] tegra_mipi_cal 3990000.mipical: DSIB_MIPI_CAL_CONFIG 0x40 0x00000200
[ 196.866657] tegra_mipi_cal 3990000.mipical: DSIC_MIPI_CAL_CONFIG 0x44 0x00000200
[ 196.866681] tegra_mipi_cal 3990000.mipical: DSID_MIPI_CAL_CONFIG 0x48 0x00000200
[ 196.866705] tegra_mipi_cal 3990000.mipical: MIPI_BIAS_PAD_CFG0 0x5c 0x00000000
[ 196.866729] tegra_mipi_cal 3990000.mipical: MIPI_BIAS_PAD_CFG1 0x60 0x00000000
[ 196.866753] tegra_mipi_cal 3990000.mipical: MIPI_BIAS_PAD_CFG2 0x64 0x00010010
[ 196.866776] tegra_mipi_cal 3990000.mipical: DSIA_MIPI_CAL_CONFIG_2 0x68 0x00000002
[ 196.866800] tegra_mipi_cal 3990000.mipical: DSIB_MIPI_CAL_CONFIG_2 0x6c 0x00000002
[ 196.866824] tegra_mipi_cal 3990000.mipical: DSIC_MIPI_CAL_CONFIG_2 0x74 0x00000002
[ 196.866847] tegra_mipi_cal 3990000.mipical: DSID_MIPI_CAL_CONFIG_2 0x78 0x00000002
[ 196.866876] nvcsi 150c0000.nvcsi: calibration failed with -110 error
[ 197.870387] tegra-vi4 15700000.vi: PXL_SOF syncpt timeout! err = -11
[ 198.870391] tegra-vi4 15700000.vi: PXL_SOF syncpt timeout! err = -11
[ 199.870386] tegra-vi4 15700000.vi: PXL_SOF syncpt timeout! err = -11

hello chivstyle,

thanks for point-out the typo, I would ask internal team for documentation update.

  1. since your sensor output 720x576@50Hz, you should also update the max_framerate property to 50-fps.
  2. below failure means VI engine cannot receive the sensor signaling,
    please refer to https://elinux.org/Jetson_TX2_Camera_BringUp to enable more debug messages.
    thanks
[ 197.870387] tegra-vi4 15700000.vi: PXL_SOF syncpt timeout! err = -11
[ 198.870391] tegra-vi4 15700000.vi: PXL_SOF syncpt timeout! err = -11
[ 199.870386] tegra-vi4 15700000.vi: PXL_SOF syncpt timeout! err = -11