Porting ADV7280A-M from Nano to TX2 NX

Hi,

I’m having trouble porting an ADV7280A-M from a Jetson Nano with Jetpack 4.4 to a TX2 NX with Jetpack 4.6. ADV7280A-M is an SDTV to MIPI CSI2 video decoder.

I have a working setup with a Jetson Nano and Jetpack 4.4 where I successfully modified the adv7180-driver to capture a test-image outputted by the ADV-chip with the following pipeline:

gst-launch-1.0 v4l2src device="/dev/video0" ! 'video/x-raw, width=720, height=576, format=UYVY, framerate=30/1' ! nvvidconv ! omxh264enc ! qtmux ! filesink location=test.mp4 -e

However, we updated our system to a Jetson TX2 NX a while ago and for compatibility reasons also updated to Jetpack 4.6.1.
At least for me, it seemed like a very simple task to port the ADV-chip. I just applied the same changes to the adv7180-driver and added the same settings to the devicetree, only modifying the CSI interface (on the Nano it is CSI5/serial_f, while on the TX2 NX it is CSI3/serial_d). The hardware setup (a custom carrier board) is similar, we just exchanged the Nano with a TX2 NX.

However, I ran into some issues:
I’m not able to capture any frames on the TX2 NX with the gstreamer-pipeline mentioned above. I periodically get the error ‘PXL_SOF syncpt timeout! err = -11’.
Log:

[  138.117559] tegra-vi4 15700000.vi: tegra_channel_error_recovery: attempting to reset the capture channel
[  138.127550] nvcsi 150c0000.nvcsi: csi4_cil_check_status (3) CILA_INTR_STATUS 0x00000004
[  138.135622] nvcsi 150c0000.nvcsi: csi4_cil_check_status (3) CILA_ERR_INTR_STATUS 0x00000004
[  138.351142] tegra-vi4 15700000.vi: PXL_SOF syncpt timeout! err = -11
[  138.357575] tegra-vi4 15700000.vi: tegra_channel_error_recovery: attempting to reset the capture channel
[  138.367547] nvcsi 150c0000.nvcsi: csi4_cil_check_status (3) CILA_INTR_STATUS 0x00000004
[  138.375614] nvcsi 150c0000.nvcsi: csi4_cil_check_status (3) CILA_ERR_INTR_STATUS 0x00000004
[  138.591139] tegra-vi4 15700000.vi: PXL_SOF syncpt timeout! err = -11
[  138.597569] tegra-vi4 15700000.vi: tegra_channel_error_recovery: attempting to reset the capture channel
[  138.607547] nvcsi 150c0000.nvcsi: csi4_stream_check_status (3) INTR_STATUS 0x00000008
[  138.615463] nvcsi 150c0000.nvcsi: csi4_stream_check_status (3) ERR_INTR_STATUS 0x00000008
[  138.623666] nvcsi 150c0000.nvcsi: csi4_cil_check_status (3) CILA_INTR_STATUS 0x00000004
[  138.631757] nvcsi 150c0000.nvcsi: csi4_cil_check_status (3) CILA_ERR_INTR_STATUS 0x00000004
[  138.851150] tegra-vi4 15700000.vi: PXL_SOF syncpt timeout! err = -11
[  138.857588] tegra-vi4 15700000.vi: tegra_channel_error_recovery: attempting to reset the capture channel
[  138.867570] nvcsi 150c0000.nvcsi: csi4_cil_check_status (3) CILA_INTR_STATUS 0x00000004
[  138.875664] nvcsi 150c0000.nvcsi: csi4_cil_check_status (3) CILA_ERR_INTR_STATUS 0x00000004
[  139.091152] tegra-vi4 15700000.vi: PXL_SOF syncpt timeout! err = -11
[  139.097591] tegra-vi4 15700000.vi: tegra_channel_error_recovery: attempting to reset the capture channel
[  139.107582] nvcsi 150c0000.nvcsi: csi4_stream_check_status (3) INTR_STATUS 0x00000008
[  139.115499] nvcsi 150c0000.nvcsi: csi4_stream_check_status (3) ERR_INTR_STATUS 0x00000008
[  139.123814] nvcsi 150c0000.nvcsi: csi4_cil_check_status (3) CILA_INTR_STATUS 0x00000006
[  139.132048] nvcsi 150c0000.nvcsi: csi4_cil_check_status (3) CILA_ERR_INTR_STATUS 0x00000006

What I’ve tried to so far:

  • Boosted the nvcsi/vi clocks (see elinux - Camera BringUp)
  • I’ve tried to find the errors in the TRM. However, the description is very cryptic:
    • CILA_INTR_STATUS 0x00000002 = intr_cil_data_lane_sot_mb_err0_a
    • CILA_INTR_STATUS 0x00000004 = intr_cil_data_lane_sot_mb_err0_a
    • CILA_INTR_STATUS 0x00000008 = intr_cil_data_lane_ctrl_err0_a
  • I’ve enabled tracing (see elinux - Camera BringUp)
    • See full the log in the attached files
    • ‘rtos_queue_send_from_isr_failed: tstamp:119030815622 queue:0x0b4a7698’ → seems like there are no frames received via CSI?
  • Measured the CSI-Lines with an oscilloscope to verify that the chip outputs something via CSI.
  • Checked the configuration of the ADV-chip after capturing started. Seem to be correct.

Can anyone explain what these errors mean or what could cause this issue?
Are there any main differences between Nano and TX2 NX which influence the device tree settings?
Any ideas on how to further debug this issues?

Attached you find some logs and the relevant device tree parts.

Thanks in advance!

devicetree_nano_working.txt (3.1 KB)
devicetree_tx2_not_working.txt (3.1 KB)
kernel_trace_tx2_not_working.txt (127.4 KB)

Please apply below patch to verify.

Hi,

Thank you for the reply. This patch has already been applied before. So the error stays the same.
Any further ideas?

Thanks in advance!
Greetings.

Please also verify below patch.

Hi,

this seems to fix my problem. THANKS! I am now able to capture the chip’s testimage and will do some further testing to verify that everything works fine.

However, I absolutely have no idea what this fix does. Can you please explain the purpose of this fix and what the issue was before?

Thanks in advance!
Greetings