While developing an adapter for the eDP port for the Jetson, I consulted 3.5.1, Figure 25 on page 57 of the “Tegra K1 Embedded Platform Guide” (version DG-07508-001v03).
The drawing states that the Negative/Positive differential lines are to be connected swapped to the eDP connector, e.g. LVDS0_TXD0_N is to be connected to LN2_P etc.
For the AUX line, however, the polarity is as expected.
In addition, the LVDS pinout looks like it is connected as expected, with pos/neg connected to pos/neg.
Looking at the “Data Sheet NVIDIA Tegra K1 series processors” (version DS-06742-007v02) under 4.4.3, page 56, it describes the various differential lines, but does not mention that there is a crucial distinction of the meaning of the pos/neg lines if used as eDP interface vs. LVDS - I would’ve expected such mention if it was indeed so.
So I suspect that the “Embedded Platform Guide” is errorneous in this regard. Is this a correct suspicion ?