How camera data go through csi interface to memory on jetson tx1 board

Hi all:
I read the Tegra_X1_TRM_DP07225001_v1.1.pdf,

the video data go through csi–>vi -->ISPA/ISPB/MCCIF–>Memory Controller,
I have tow questions about this?

  1. How the kernel transfer the video frame from vi to Memory Controller,
  2. How can i get the data from Memory Controller, from some fixed memory address,
    If this is in kernel driver, which file ?
    best regards

hello xavierSFan,

there are two kinds of data flows, one will go through ISP and the other won’t. it will go through ISP if you’re using gstreamer to issue a capture request. if you’re using v4l2-ctl to issue a capture request, you can receive the data buffer output from the vi driver.

you can refer to the VI kernel driver as below path.

also, we’re using vb2_buffer structure to send our video buffer, you can refer to the structure definition at below path.