I read the Tegra_X1_TRM_DP07225001_v1.1.pdf,
the video data go through csi–>vi -->ISPA/ISPB/MCCIF–>Memory Controller,
I have tow questions about this?
- How the kernel transfer the video frame from vi to Memory Controller,
- How can i get the data from Memory Controller, from some fixed memory address,
If this is in kernel driver, which file ?