We’re currently working on an ISL79987 driver for AGX Orin with an analog camera, we’re able to capture the MIPI-CSI 2 packet, but we’re having an image with two fileds odd and even (Top - Bottom) as shown in the screenshot below
Is there any software that we have to implement in nvidia tegra driver (channel.c, vi5.c, vi5_ops.c etc…) to be able to combine/fuse (interlace) the two fields to one frame ?
Is there anyway to do this kind of processing using the Jetson AGX Orin camera hardware to get one frame from two fields ?
you may refer to 12_camera_v4l2_cuda to capture frame data into CUDA buffer and implement de-interlacing function through CUDA.
please see-also similar discussion threads, for example, Topic 196419, or Topic 180937.
thanks
Thank you for your answer, so if i understand from what you say and the topics you have shared, all jetson tegra platforms don’t support interlaced input, we have to implement by software the de-interlacing algorithm using cuda for example or other APIs ?
Also can you please tell me, in the channel driver why the size of allocated buffer is dubbed when the used mode is interlaced ?
/* Double the size of allocated buffer for interlaced sensor modes */
if (chan->is_interlaced)
chan->format.sizeimage *= 2;
this is driver specific for interlace modes, for example, we receive two fields in separate consecutive frames and write them in a single buffer of size, double the height of selected sensor mode.
hence, adjusting the image size to allocate an optimally sized buffer.
by default it’s supported with progressive source.
you’ll need to report the configuration to let driver know the sensor mode is interlaced and the type of interlaced mode.
assume the interlaced captures is top and bottom, you may setting interlaced_type = 1; for processing.
you should also update the image size in the sensor device tree, which should be the field size instead of entire frame size,
for example, a 1920x1080i image sources, the active_h should be 540 but not 1080.