Hi NV Support Team
We want to used two orin communction with PCIe, Reference “Jetson_AGX_Xavier_Series_PCIe_Endpoint_Design_Guidelines_DA-09357-001_v1.3”
e.g. in below figure 1. The left Xavier as root port and right Xavier as end port.
The “CLKREQ_N” used bidirection buffer, “RST” / “WAKE” use unidirection buffer.
My query: Why only “CLKREQ_N” need add Bidirectional buffer as show in below.
From my understanding if left Xavier as root port, that means CLKREQ_N is input for root port.
it is not bidirection if we have fixed RP selection. Is it correct?