Hi,
I would like to have the AGX Orin communicate with the PCIe Root complex and the FPGA as the Endpoint.
I have a question about whether the GPxx_PCIEn_CLKREQ_N signal should be connected to FPGA.
If I operate with ASPM L1SS disabled, can the GPxx_PCIEn_CLKREQ_N signal be N/C?
Best Regards,
UNA