Jetson AGX Orin SOM Internal Signal Trace Length / Delay Data Availability

Robotics & Edge Computing Jetson Systems Jetson AGX Orin
1

Hello NVIDA Team,

I am currently working on a custom carrier board design using the Jetson AGX Orin SOM (P3701) and I would like to clarify the availability of internal PCB routing information fır the module.

Some SOM/core board manufacturers provide a “Core Board Signal Trace Length” file containing routing information between the processor/device and the board-to-board connector. For example, such files may contain parameters including:

  • Signal/Pin Name
  • Connector Pin Number
  • Minimum Trace Delay (ps)
  • Maximum Trace Delay (ps)
  • Board Trace Length (mils)
  • Total/Equivalent Length (mils)

I am looking for equivalent information for the Jetson AGX Orin P3701 SOM, specifically the internal trace lengths and/or propagation delay from the SoC/device side to the SOM board-to-board connector.

I understand that the Jetson AGX Orin Series Design Guide provides routing constraints for the custom carrier board. However, my question is specifically about the internal routing of the P3701 SOM itself, rather than carrier-board routing constraints.

I also found a previous NVDIA Developer Forum discussion from 2024 where a similar question regarding an Excel file containing trace lengths within the module was answered with “We don’t share that.”

Could you please confirm whether this is still the case?

More specifically:
1-) Is the P3701 SOM internal signal trace length/propagation delay data available to customers?
2-) Is there an NVIDIA document, spreadsheet, constraint database, or other design file containing this information?
3-) If it is not publicly available, can it be obtained through an NVIDIA representative, NVDA, Partner Network, or another controlled-access channel?
4-) For high-speed interfaces such as PCIe/UPHY, MIPI CSI, DisplayPort/HDMI, USB 3.x, and 10GbE/MGBE, should carrier-board length matching be performed using only the limits specified in the Jetson AGX Orin Series Design Guide, without accounting for the individual internal P3701 SOM trace lengths?

I would appreciate confirmation regarding the current availability of this information.
Thank you.

5

P3701 internal trace-length/propagation-delay data is not publicly shared.

For the custom carrier board PCB design, please use the Jetson AGX Orin Series Design Guide. The carrier trace calculation starts at the module connector and includes the carrier PCB plus any flex or secondary PCB routing. Do not estimate or compensate for the unpublished internal Jetson AGX Orin module routes unless the relevant interface section explicitly instructs otherwise.