Some confuse for figure 3-3.
If we use DPHY the CSI_A_CLK_N connect to DA1_N. I dont think it is correct for DPHY use case. From MAX96712 datasheet if setting as DPHY, the DA1_N means Data 1_N not CLK_N.
Why you comment the guide is correct for D-PHY connection？
From MAX96712 datasheet the DA1N: D-PHY Port A data Lane1 inverted ouput.
But your guide connect to CSI_A_CLK_N. Can you please double check again.
I have double check your design guide.
Some conflict in document. e.g. the 3.3 show the mapping #2 in table 3-2 support both D-PHY and C-PHY.
The mapping same as figure 3-4
So from my understanding we can used figure 3-4 / mapping #2 to support both D-PHY and C-PHY.
Please help check with your RD, if the design guide wrong. Please also update design guide.
We will update Jetson AGX Orin Series Camera Module Hardware Design Guide:
Figure 3-3 note: only CPHY is supported.
Figure 3-4 note: both CPHY and DPHY could be supported.
Please double check the de-serializer spec to confirm the connection.