I have a system where I2C2, GPIO06, CAM0_PWDN, CAM_I2C, PCIE0_WAKE are all greater than 0.5V prior to SYS_RESET* coming up. Is this a definite problem?
Has anyone experienced hardware failures due to signals being active before SYS_RESET* goes high?
Hi, it is not suggested. The carrier power rails should be on after module as requested in power on sequence in Design Guide.
What kinds of failures would it cause? Catastrophic hardware failures? Or just software/bootup glitches?
It could cause wrong module pin status and even could damage module itself.
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