Power-On timing

Per the Jetson Nano product design guide:

“The carrier board receives the main power source and uses this to generate the enable to Jetson Nano (POWER_EN) after the carrier board has ensured the main supply is stable and the associated decoupling capacitors have charged. The carrier board supplies are not enabled at this time. Once POWER_EN is driven active (high), Jetson Nano begins to Power-ON. When the module Power-ON sequence has completed, the SYS_RESET* signal is driven inactive (high) and this is used by the carrier board to enable its various supplies.”

My question: is there a minimum time that the 5V rail must be up before POWER_EN is asserted? The power up sequence (Figure 4, Nano Product Design Guide) timing diagram does not specify a time

The time is not list in detail number but guaranteed by circuit design, you can check the Module Power ON/OFF Logic page in reference schematic for more detail info.

I understand that external logic is used to provide the POWER_EN signal on the dev carrier board, but I am working with a custom hardware. Can you please tell me if there is a minimum wait time we need to guarantee 5V is up before POWER_EN goes high? Our custom board does not have the SR latch featured on the carrier board

No such test result, but according to other platform, 300ms delay after 5V is stable will be quite safe.


I am powering the Jetson Nano via the 40-pin expansion header on the carrier board. I have the power selection header (J48) shorted using a jumper. I’ve been experiencing intermittent boot failures where the 3v3 regulator does not produce the proper voltage on the power rail.

I’ve observed behavior where no voltage is output from the regulator or a low voltage (~2V or less) is present on the 3v3 rail. I understand that the PGOOD indicator of the 3v3 regulator is tied to the enable of the 1v8 regulator, and thus the Nano will not receive power if the 3v3 regulator does not produce a voltage between 90% and 115% of the nominal value.

The boot failure occurs, almost always, when the device has been left unpowered for long periods of time (e.g. overnight).

Has anybody else experienced these issues? Are there any other configuration details that I am missing for power via the 40-pin header?


For to power via J41, please refer to this topic: https://devtalk.nvidia.com/default/topic/1069635, more GND connections and shorter power cable are effective.

Great, thank you Trumany!