Unused pin

  1. Our SSD doesn’t have SUSCLK in pin 68 but there is a SUSCLK pin connected (shown in the reference design from NVIDIA as below). Can I place NC on pin 68 of J11 directly? Any concerns?
  2. We are confused with the difference between your reference design guide and schematic checklist. In your reference design**, P3768-A04 Jetson Orin NX Carrier Board** ,you pull up the I2C and NC the resistor, which means no pull ups, and on checklist “shows that “do not have pull-ups on the carrier board since the devices are pulled to 3.3V on the module with 2.2kohm resistors ”. What does the devices you mean here? I am confused if we need to add pull up resistor next to I2C or not, and so does the value of the resistor that populate on the board.
  3. I am not sure that what does PCIE[1:0] point out? Does it include PCIE1(picA) only? Or contain PCIE0 (pic B)as well
    4.following the question 3, how can I deal with pin 174, pin 172, pin 169, pin 167 if I don’t’ need to use them? Can I left them unconnected as well?Thanks

Please post to Orin nano zone next time.

  1. It depends on your SSD device. If SUSCLK pin is not used, you can put it NC. Not sure about your device concern.
  2. Just the meaning of words. No pull-up is needed.
  3. Where is the “PCIE[1:0]” you mentioned?
  4. Leave them unconnected.

In your Jetson Orin NX Series and Jetson Orin Nano Series Product Design Guide page87 Table 14-1

That’s a typo which should be PCIE[3:0].

I didn’t find PCIE3:0_WAKE. Please provide all PCIE pin numbers which belongs to PCIE[3:0]_CLK/RST/CLKREQ/WAKE specifically. Thanks.

Sorry for the late response, have you managed to get issue resolved or still need the support? Thanks

Please refer to the pinmux sheet in DLC for all pins number.

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