Xavier NX SYS_RESET* assertion duration

Robotics & Edge Computing Jetson & Embedded Systems Jetson Xavier NX
1

Hi,

A couple of questions regarding the SYS_RESET* pin functionality during normal operation.

  1. When used as an input to the module to power cycle the module, how long should the SYS_RESET* pin be held low before releasing it?
  2. When the SYS_RESET* pin is asserted by the carrier board during a module reset, should the VDD_IN (main power) and the POWER_EN also be OFF and driven low respectively? If yes, how is this different from just turning OFF the power (VDD_IN and POWER_EN) to the module without asserting SYS_RESET*?
3
  1. Its debounce time is typical 30ms.
  2. No, only asserting sys_reset* pin is necessary to implement a reset from carrier.
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