Jetson Xavier NX thermal solution

I’m designing a thermal solution for a Jetson Xavier NX board. I am seeing worrisome amounts of heat from the eMMC and PMIC chips, based on the thermal design guide’s power and thermal resistance #s (pg. 10 of TDG-09774-001_v1.3). This application requires the Jetson to be in a hermetically sealed box outdoors (i.e. hot). Should I expect to be heat-sinking the eMMC and PMIC chips in addition to the SoM, or is it really true that I only need to worry about heat-sinking the SoM?

Hi Dave,

Welcome to the NVIDIA Developer forums!. I am moving your topic to the Jetson category so the support team can respond to your issue.

Hi, TDG has listed the components that need to be monitored, like eMMC and PMIC, which means the custom thermal solution should take care about the heat-sinking of them.

Yes, I understand that there is a full list of chips that need to be looked at. But the eMMC in particular has really high Rj-b in Table 3-2. If I run a thermal simulation of just the board (no hermetic enclosure) in a 25C ambient, the eMMC gets totally fried. Yet the dev kit seems to work in reality with no thermal solution on the board bottom side. Does the Jetson board have something (like vias) designed into it to cool the eMMC, and this effect is not captured in the Rj-b value? Of course computer simulations never exactly match real-world performance, but my simulation is showing that the eMMC ought to get totally fried and yet the dev kit works w/o a heat sink contacting the eMMC. This is a major disconnect between simulation and reality, so I am wondering if there is more to the story. Is the Rj-b in the TDG mis-printed, or does the board have some provisions for cooling the eMMC? Thank you for your time and thoughts.

Hi, how do you run such simulation? For eMMC, the Tcase (95C) is the limit for thermal solution.

I am using SolidWorks Flow Simulation 2020. They call it flow simulation software but it also does heat calculations.

Can you share how you calculate/simulate to get this: “But the eMMC in particular has really high Rj-b in Table 3-2. If I run a thermal simulation of just the board (no hermetic enclosure) in a 25C ambient, the eMMC gets totally fried”?

It would be a lot of typing to fully answer re: how to set up the simulation. But I model the raw PCB and the chips of interest (like the SoC, 4x memory chips, eMMC, and PMIC) all as separate parts and put them into a .sldasm. Then each part gets its own material property assignment and heat load specified. Next, specify a contact resistance on the top and bottom face of each chip (using the resistance #s in Table 3-2). It’s also nice but not totally necessary to specify adiabatic (zero heat transfer) on the sidewalls of each chip. Mesh it, run it, and look at results.

TDG is what we can provide, its limit/spec are from the device datasheet and etc. which should have been validated. We don’t meet such Rj-b question from users who follow the guide before.

OK thanks. So it sounds like thermal resistance values are from the chip manufacturers and don’t take into account any heat spreading or other thermal features that may be provided by the PCB. Unless my simulations are way off, it looks like Nvidia has designed some thermal features into the board to help these chips survive the heat.

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