Shorting CSI1 and CSI4


We are intending to built a system with four cameras. I made a board design which uses four CSI ports: CSI0, CSI1, CSI2, and CSI3. I have realized recently that CSI1 can not actually to be used in 2-lanes configuration and now I’m looking for work-around solution.
I would like to short CSI1 (two lanes + clock) and CSI4 on the board. I hope that CSI4 would be not loaded by the “parasitic” connection of CSI1. I also would like to ask what are pin states(HiZ, Input, etc.) of CSI1 would be if CSI1 will not appear in the device tree. In general all pins should be input, as a port nature, however I wanted to check your opinion and recommendations on that matter.


Hi, the CSI Configuration table in OEM DG is the only setting that nano supports, please follow that well.

Thanks. Yes, It is clear, but what are the state of the CSI1 port pins(from HW point of view)if not configured. It is what I asked.


It is not suggested to do so. Maybe you can set the CSI1 pins to HiZ in pinmux sheet, but again, it is not validated.