Hi:
We have a custom designed board(tx2).
We expanded the bayer_rggb12 and can get the pictures with v4l2 api and nvcamerrasrc.
But we get the error:
[ 121.979588] misc tegra_camera_ctrl: ISO BW req 2147483647 > 4687500 (max) capping to max
[ 121.987896] misc tegra_camera_ctrl: vi_v4l2_update_isobw: requested iso bw is larger than max
pipeline:
gst-launch-1.0 nvcamerasrc sensor-id=0 fpsRange="52.0 52.0" !\
'video/x-raw(memory:NVMM), format=(string)I420, width=(int)1280, height=(int)720,framerate=(fraction)52' !\
nvoverlaysink -ev
May be there is something wrong with DT?
hardware/nvidia/platform/t18x/common/kernel-dts/t18x-common-modules/tegra186-camera-ar0134-li-mipi-adpt-a00.dtsi
/ {
host1x {
vi@15700000 {
num-channels = <1>;
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
ar0134a_vi_in0: endpoint {
csi-port = <0>;
bus-width = <2>;
remote-endpoint = <&ar0134a_csi_out0>;
};
};
};
};
nvcsi@150c0000 {
num-channels = <1>;
#address-cells = <1>;
#size-cells = <0>;
channel@0 {
reg = <0>;
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
ar0134a_csi_in0: endpoint@0 {
csi-port = <0>;
bus-width = <2>;
remote-endpoint = <&ar0134a_out0>;
};
};
port@1 {
reg = <1>;
ar0134a_csi_out0: endpoint@1 {
remote-endpoint = <&ar0134a_vi_in0>;
};
};
};
};
};
};
i2c@3180000 {
clock-frequency = <100000>;
tc358746_a@0e {
compatible = "nvidia,tc358746a";
reg = <0x0e>;
vdd-gpios = <&tegra_main_gpio TEGRA_MAIN_GPIO(R,5) GPIO_ACTIVE_HIGH>;
};
ar0134_a@10 {
compatible = "nvidia,ar0134a";
reg = <0x10>;
devnode = "video0";
physical_w = "10.0";
physical_h = "10.0";
sensor_model ="ar0134a";
post_crop_frame_drop = "0";
use_decibel_gain = "false";
delayed_gain = "false";
use_sensor_mode_id = "true";
mode0 {/*mode AR0134_MODE_640X800_CROP_89FPS*/
mclk_khz = "24000";
num_lanes = "2";
tegra_sinterface = "serial_a";
discontinuous_clk = "no";
dpcm_enable = "false";
cil_settletime = "0";
dynamic_pixel_bit_depth = "12";
csi_pixel_bit_depth = "12";
pixel_t="bayer_rggb12";
mode_type = "bayer";
pixel_phase = "rggb";
active_w = "1280";
active_h = "720";
readout_orientation = "0";
line_length = "1280";
inherent_gain = "1";
mclk_multiplier = "3.550";
pix_clk_hz = "85196800";
min_gain_val = "0"; /* dB */
max_gain_val = "7.97"; /* dB */
min_hdr_ratio = "1";
max_hdr_ratio = "1";
min_framerate = "30";
max_framerate = "52";
min_exp_time = "2471";
max_exp_time = "4942";
embedded_metadata_height = "0";
};
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
ar0134a_out0: endpoint {
csi-port = <0>;
bus-width = <2>;
remote-endpoint = <&ar0134a_csi_in0>;
};
};
};
};
};
};
/ {
tegra-camera-platform {
compatible = "nvidia, tegra-camera-platform";
num_csi_lanes = <2>;
max_lane_speed = <1500000>;
min_bits_per_pixel = <12>;
vi_peak_byte_per_pixel = <2>;
vi_bw_margin_pct = <25>;
isp_peak_byte_per_pixel = <5>;
isp_bw_margin_pct = <25>;
tpg_max_iso = <3916800>;
modules {
module0 {
badge = "ar0134a_bottomleft_ar0134";
position = "bottomleft";
orientation = "0";
drivernode0 {
/* Declare PCL support driver (classically known as guid) */
pcl_id = "v4l2_sensor";
/* Driver v4l2 device name */
devname = "ar0134a 2-0010";
/* Declare the device-tree hierarchy to driver instance */
proc-device-tree = "/proc/device-tree/i2c@3180000/ar0134_a@10";
};
};
};
};
};
hardware/nvidia/platform/t18x/common/kernel-dts/t18x-common-platforms/tegra186-quill-camera-ar0134-li-mipi-adpt-a00.dtsi
#include <t18x-common-modules/tegra186-camera-ar0134-li-mipi-adpt-a00.dtsi>
#include "dt-bindings/clock/tegra186-clock.h"
/* camera control gpio definitions */
/ {
i2c@3180000 {
ar0134_a@10 {
/* Define any required hw resources needed by driver */
/* ie. clocks, io pins, power sources */
/* mclk-index indicates the index of the */
/* mclk-name with in the clock-names array */
clocks = <&tegra_car TEGRA186_CLK_EXTPERIPH1>,
<&tegra_car TEGRA186_CLK_PLLP_OUT0>;
clock-names = "extperiph1", "pllp_grtba";
mclk = "extperiph1";
/*clock-frequency = <24000000>;*/
/*reset-gpios = <&tegra_main_gpio CAM0_RST_L GPIO_ACTIVE_HIGH>;*/
};
};
};
hardware/nvidia/platform/t18x/common/kernel-dts/t18x-common-plugin-manager/tegra186-quill-camera-plugin-manager.dtsi
fragment-ar0134a@0 {
ids = "LPRD-002001";
override@0 {
target = <&ar0134a_cam0>;
_overlay_ {
status = "okay";
};
};
override@1 {
target = <&cam_module0>;
_overlay_ {
status = "okay";
badge = "ar0134a_bottom_ar0134a";
position = "bottom";
orientation = "0";
};
};
override@2 {
target = <&cam_module0_drivernode0>;
_overlay_ {
status = "okay";
pcl_id = "v4l2_sensor";
devname = "ar0134a 2-0010";
proc-device-tree = "/proc/device-tree/i2c@3180000/ar0134_a@10";
};
};
override@3 {
target = <&cam_module0_drivernode1>;
_overlay_ {
status = "okay";
pcl_id = "v4l2_lens";
};
};
/* Enable VI ports */
override@4 {
target = <&vi_base>;
_overlay_ {
num-channels=<1>;
};
};
override@5 {
target = <&vi_port0>;
_overlay_ {
status = "okay";
};
};
override@6 {
target = <&ar0134a_vi_in0>;
_overlay_ {
status = "okay";
csi-port = <0>;
bus-width = <2>;
remote-endpoint = <&ar0134a_csi_out0>;
};
};
/* Enable CSI ports */
override@7 {
target = <&csi_base>;
_overlay_ {
num-channels=<1>;
};
};
override@8 {
target = <&csi_chan0>;
_overlay_ {
status = "okay";
};
};
override@9 {
target = <&csi_chan0_port0>;
_overlay_ {
status = "okay";
};
};
override@10 {
target = <&ar0134a_csi_in0>;
_overlay_ {
status = "okay";
csi-port = <0>;
bus-width = <2>;
remote-endpoint = <&ar0134a_out0>;
};
};
override@11 {
target = <&csi_chan0_port1>;
_overlay_ {
status = "okay";
};
};
override@12 {
target = <&ar0134a_csi_out0>;
_overlay_ {
status = "okay";
remote-endpoint = <&ar0134a_vi_in0>;
};
};
/* tegra-camera-platform settings */
override@13 {
target = <&tcp>;
_overlay_ {
num_csi_lanes = <2>;
max_lane_speed = <1500000>;
min_bits_per_pixel = <12>;
vi_peak_byte_per_pixel = <2>;
vi_bw_margin_pct = <25>;
isp_peak_byte_per_pixel = <5>;
isp_bw_margin_pct = <25>;
};
};
};