How to layout the carrier board of tx2nx's csi line

I want to manufacture a carrier of tx2nx by myself. I reference to carrier of xavier. I found that the length of the csi line is not equal. It differ about 200mil between clk and date line on the xavier nx carrier. I want to know the length of module’s csi?

There is MIPI DSI and CSI Interface Signal Routing Requirements in TX2 NX Product Design Guide in DLC, please follow that to make custom board.

Can you show me where it is?
I just find out “Max trace delay skew between DQ and CLK 5ps”(calculate about 30 mil) on page 31. But on the carrier of xavier nx, it’s about 200 mil.
I don’t know which one is correct?

Are you designing for TX2 NX? If so, just follow the guide of it, not Xavier NX.

I am using tx2nx and the Xavier NX carrier.
The Xavier NX carrier’s design doesn’t match the TX2 NX Design Guide. Because somebody of forum let me reference the Xavier NX carrier PCB and the design guide. I am confused.
Here is the PCB picture of P3509

So you are using devkit for that? TX2 NX module is compatible to Xavier NX carrier of devkit. You can refer to this doc for the interface comparison and migration between them:

https://developer.nvidia.com/jetson-tx2-nx-interface-comparison-migration-da-10170-001-v10pdf

I know TX2 NX module is compatible to Xavier NX carrier of devkit. I want to manufacture the carrier of TX2 NX. I will reference the TX2 NX Product Design Guide and the Xavier NX carrier. But I find that the regulation of the csi length routing is different from the TX2 NX Product Design Guide and the Xavier NX carrier PCB. So I feel confused.
I want to know which regulation PCB routing of csi I should follow? The TX2 NX Product Design Guide or the Xavier NX carrier PCB?

Please follow TX2 NX design guide to make custom design. That is correct without question. Regarding the board file of devkit, we will check that to make sure if it violate the limit.

OK!I will follow the TX2 NX design guide. Thanks!

Hi, that is correct for Xavier NX devkit board to follow the limit in Xavier NX design guide. There are different “Max trace delay skew between DQ and CLK” between TX2 NX and Xavier NX, as the routing in the module is different.

@Trumany
That means if I use tx2nx module on the Xavier NX carrier, the csi will be abnormal?